JPH0335855B2 - - Google Patents

Info

Publication number
JPH0335855B2
JPH0335855B2 JP56138934A JP13893481A JPH0335855B2 JP H0335855 B2 JPH0335855 B2 JP H0335855B2 JP 56138934 A JP56138934 A JP 56138934A JP 13893481 A JP13893481 A JP 13893481A JP H0335855 B2 JPH0335855 B2 JP H0335855B2
Authority
JP
Japan
Prior art keywords
circuit
output
flip
logic gate
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56138934A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5840921A (ja
Inventor
Mitsutoshi Sugawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP56138934A priority Critical patent/JPS5840921A/ja
Publication of JPS5840921A publication Critical patent/JPS5840921A/ja
Publication of JPH0335855B2 publication Critical patent/JPH0335855B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
JP56138934A 1981-09-03 1981-09-03 フリツプフロツプ回路および分周回路 Granted JPS5840921A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56138934A JPS5840921A (ja) 1981-09-03 1981-09-03 フリツプフロツプ回路および分周回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56138934A JPS5840921A (ja) 1981-09-03 1981-09-03 フリツプフロツプ回路および分周回路

Publications (2)

Publication Number Publication Date
JPS5840921A JPS5840921A (ja) 1983-03-10
JPH0335855B2 true JPH0335855B2 (en]) 1991-05-29

Family

ID=15233554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56138934A Granted JPS5840921A (ja) 1981-09-03 1981-09-03 フリツプフロツプ回路および分周回路

Country Status (1)

Country Link
JP (1) JPS5840921A (en])

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59191927A (ja) * 1983-03-26 1984-10-31 Fuji Facom Corp 同期回路

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LEE MAXWELL,CARIOS MARAZZI,DIPL-LNG=1966 *

Also Published As

Publication number Publication date
JPS5840921A (ja) 1983-03-10

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